The inventive concept relates to a semiconductor memory device, and more particularly, to a semiconductor memory device performing a parity check, a memory system, and a method of operating the semiconductor memory device.
As an operating speed of a semiconductor memory device increases, error probability of signals transmitted or received in a memory system may increase. For example, a dynamic random access memory (DRAM), which is an example of a semiconductor memory device, is a memory device having finite data retention characteristics; the DRAM receives, for example, a command, an address or a chip select signal from a memory controller to perform a memory operation requested by the memory controller via an internal operation such as command decoding or address controlling. Error free operation of a semiconductor memory device is crucial irrespective of the density and speed capacity of the memory device.